Roy,
Some time back, I faced the similar problem with
SSPC, on my PXA255 based board. After chekcing the
hardware and PXA 255 manual, I found that the clock
was not enabled for SSPC.
In PXA250/255, Clock Enable Register controls
the clock to peripherals.
-seshu
--- "Roy.King" <ruy@xxxxxxxxxxx> wrote:
> hello everyone:
> I have a board that use PXA250 and the system
> base on
> kernel-2.4.18-rmk7-pxa1. On the board, we connect
> SSPC with ADS7843, and
> we use ads7843 connect to a touch screen. I want to
> write a driver for
> SSP.
> first, I tested the SSP in Loop-Back Mode, in this
> mode when datas is
> sent to transmit FIFO, immediately datas will be
> transfored from
> transmit FIFO to recevie FIFO, dosen't it.
> Unfortunately, it dosen't
> work, whenever i sent any datas to transmit FIFO by
> setting SSDR (SSDR =
> datas), the register SSSR[TFL] is increasing, the
> SSDR always is zero.
> when SSSR[TFL] is high than transmit FIFO threshold,
> the SSSR[TFS] is
> set to zero and can not generate transmit interrupt
> at all. In fact, the
> recevie interrupt never be generate, for the
> SSSR[RFS] always is zero. I
> set the SSP control Register like this:
> SSCR0[SCR] = 255
> SSCR0[SSE] = 1
> SSCR0[ECS] = 0
> SSCR0[FRF] = 0 //work on SPI mode
> SSCR0[DSS] = 15
>
> SSCR1[RFT] = 2
> SSCR1[TFT] = 8
> SSCR1[MWDS] = 1
> SSCR1[SPH] = 0
> SSCR1[SPO] = 1
> SSCR1[LBM] = 1 //Loop-Back Mode
> SSCR1[TIE] = 1 //generate transmit interrupt
> SSCR1[RIE] = 1 //generate recevie interrupt
>
> what's wrong with me?
>
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