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Re: CMUCL on Opterons??: msg#00061lisp.cmucl.devel
Martin Cracauer <cracauer@xxxxxxxx> writes: > This doesn't work. The modes are not compatible enough to run a > literal piece of 32 bit binary code in a 64 bit process. What he says. In my (ongoing) SBCL port to the AMD64 I've run into two places so far where the x86 code generated by Python does something utterly different on x86-64 - 1) x86-64 uses an extra ("REX") instruction prefix to select 64 bit modes and the extra registers. These are bytes #x40-#x4f, which in the real x86 are forms of the INC and DEC instructions. 2) x86-64 has a RIP-relative addressing mode which is selected by a particular suffix (ModRM) byte hitherto used for (I think, it's been two weeks since I hacked on this) absolute indexing from zero. RIP (PC)-relative addressing actually ought to be useful for Python if it means we can lose a lot of the fixups in code components: fewer dirty pages and less frobbing when GC runs It's also worth noting that the ABI for calling into C is significantly different - it passes arguments in registers, almost like a real computer - so if you want a Lisp that can do any kind of IO, that bit needs sorting out too. My opinion so far is that the x86-64 really is "a bag on the side of the [x86]"[*], but, well, the x86 is already a pretty disgusting accretion of hacks made tolerable only by its commodity price, so who cares? There's an Opteron board out now that can take 16Gb of memory and costs around $450: it's hard to get sniffy about elegance with toys like that to play with. -dan [*] For anyone who hasn't read "Soul of a New Machine", the reference is to the Data General Eagle: ``Ed DeCastro told the design engineers, "I don't want a bag on the side of the Eclipse, this is a 32 bit system with 16 bit backward compatibility, no mode bit."'' -- http://webpages.charter.net/dperr/bio.htm -- "please make sure that the person is your friend before you confirm"
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