Re: Re: SMP KGDB on ppc64?

Tom Rini wrote:
> On Tue, Jan 10, 2006 at 06:38:28PM +0530, Amit Kale wrote:
> 
>>On Tuesday 10 Jan 2006 3:13 am, Geoff Levand wrote:
>>
>>>Tom Rini wrote:
>>>
>>>>On Sat, Jan 07, 2006 at 03:39:23PM -0800, Geoff Levand wrote:
>>>>
>>>>>Tom Rini wrote:
>>>>>
>>>>>>Hey, in your tests were you ever able to get KGDB to reliably always
>>>>>>sync up all CPUs on an SMP system?  I've found that what we have, at
>>>>>>least as of kgdb-2-2.6.14 is OK up to the point we come back from a
>>>>>>stepped into function, and then the 2nd CPU seems to always be lost
>>>>
>>>>(gdb
>>>>
>>>>
>>>>>>seems to be switching from the 2nd CPU thread to the actual pid's
>>>>
>>>>thread
>>>>
>>>>
>>>>>>and back a bit).  Any ideas if something is missing?  I bumped up
>>>>>>ROUNDUP_WAIT to 1000000 and that hasn't helped any.  Thanks.
>>>>>
>>>>>The last ppc64
>>>>>patches I sent you were for 2.6.12, and those worked OK (SMP/SMT sync
>>>>>worked) on PMAC G5 and Cell with both serial and Ether connections.
>>>>
>>>>OK.  Can you try the test I've been using of breaking at sys_sync, and
>>>>then 's 5000' and see if it hangs, or you can continue, or if you get a
>>>>lot of "Could not sync..." messages?
>>>
>>>My implementation uses smp_send_debugger_break, which does not handle
>>>synchronization objects nor disabled interrupts properly in all cases.
>>>You'll get 'Not all CPUs have been synced for KGDB'.  I used this
>>>because it was easy to get something working that could be used for
>>>simple debugging of device driver code.
>>
>>This implementation uses smp_call_function, which is a blocking call. You may 
>>want to implement a send_IPI_allbutself for powerpc64 using smp_cross_call, 
>>instead. I don't know ppc64 well enough, though I believe this should provide 
>>a non-blocking way of holding other cpus.
>>
>>Does powerpc have an NMI like i386, which breaks in regardless of whether 
>>interrupts are disabled?
> 
> 
> That's just the first message :)  In the rest of the thread George makes
> that point, and Geoff finds the rough equivalent, which we have in CVS
> today, that works most of the time, but is trip-up-abble.
> 

I just looked at the latest in CVS (powerpc-lite.patch), and it has
my smp fixes (uses smp_send_debugger_break).  I also noticed a comment
that arch/powerpc support is not working.  I'll test it with
2.6.15 on Ebony and PMAC G5 soon.  I'll be busy next week,
so maybe I'll get to it the following week.

Regarding Amit's question, the PPC architecture does not have an
equivalent of the i386 APIC's IPI.  Some platforms may have platform
specific ways to signal CPU's though.  From what I understand, PMAC
has a GPIO setup to do a soft reset that can be used.

-Geoff


-------------------------------------------------------
This SF.net email is sponsored by: Splunk Inc. Do you grep through log files
for problems?  Stop!  Download the new AJAX search engine that makes
searching your log files as easy as surfing the  web.  DOWNLOAD SPLUNK!
http://ads.osdn.com/?ad_id=7637&alloc_id=16865&op=click