Project : madwifi
Revision : 2697
Author : mickflemm (Nick Kossifidis)
Date : 2007-08-30 13:55:21 +0200 (Thu, 30 Aug 2007)
Log Message :
* Fix compilation on non-up-to-date trees
Affected Files:
* branches/ath5k/ath5k.h updated
* branches/ath5k/ath5k_base.h updated
* branches/ath5k/ath5k_hw.c updated
* branches/ath5k/ath5k_hw.h updated
* branches/ath5k/ath5k_hw_inivals.c updated
* branches/ath5k/ath5k_hw_phy.c updated
Modified: branches/ath5k/ath5k.h
===================================================================
--- branches/ath5k/ath5k.h 2007-08-30 01:59:13 UTC (rev 2696)
+++ branches/ath5k/ath5k.h 2007-08-30 11:55:21 UTC (rev 2697)
@@ -20,6 +20,7 @@
/*#define AR5K_DEBUG 1 */
#include <linux/types.h>
+#include <asm/io.h>
#include <net/mac80211.h>
#include "ath5k_hw.h"
Modified: branches/ath5k/ath5k_base.h
===================================================================
--- branches/ath5k/ath5k_base.h 2007-08-30 01:59:13 UTC (rev 2696)
+++ branches/ath5k/ath5k_base.h 2007-08-30 11:55:21 UTC (rev 2697)
@@ -18,6 +18,14 @@
#include "ath5k.h"
+#ifndef PCI_VENDOR_ID_ATHEROS
+#define PCI_VENDOR_ID_ATHEROS 0x168c
+#endif
+
+#ifndef PCI_VENDOR_ID_3COM_2
+#define PCI_VENDOR_ID_3COM_2 0xa727
+#endif
+
#define ATH_TIMEOUT 1000
#define ATH_LONG_CALIB 30 /* seconds */
Modified: branches/ath5k/ath5k_hw.c
===================================================================
--- branches/ath5k/ath5k_hw.c 2007-08-30 01:59:13 UTC (rev 2696)
+++ branches/ath5k/ath5k_hw.c 2007-08-30 11:55:21 UTC (rev 2697)
@@ -94,7 +94,7 @@
*/
value = AR5K_CCK_TX_TIME(rate->rate_kbps, frame_length,
(short_preamble &&
- (rate->modulation == MODULATION_CCK_SP)));
+ (rate->modulation == IEEE80211_RATE_CCK_2)));
break;
case IEEE80211_RATE_OFDM:
@@ -1773,7 +1773,7 @@
ee->ee_ant_control[mode][i++] = val & 0x3f;
/* Get antenna modes */
- hal->ah_antenna[mode][0]
+ hal->ah_antenna[mode][0] =
(ee->ee_ant_control[mode][0] << 4) | 0x1;
hal->ah_antenna[mode][AR5K_ANT_FIXED_A] =
ee->ee_ant_control[mode][1] |
Modified: branches/ath5k/ath5k_hw.h
===================================================================
--- branches/ath5k/ath5k_hw.h 2007-08-30 01:59:13 UTC (rev 2696)
+++ branches/ath5k/ath5k_hw.h 2007-08-30 11:55:21 UTC (rev 2697)
@@ -430,25 +430,25 @@
* retrieve the values which we do not want to clear (let's call this
* old_data) and then set the register with this and our new_value:
* ( old_data | new_value) */
-#define AR5K_REG_WRITE_BITS(_reg, _flags, _val)
\
- AR5K_REG_WRITE(_reg, (AR5K_REG_READ(_reg) & ~(_flags)) | \
- (((_val) << _flags##_S) & (_flags)))
+#define AR5K_REG_WRITE_BITS(hal, _reg, _flags, _val) \
+ ath5k_hw_reg_write(hal, (ath5k_hw_reg_read(hal, _reg) & ~(_flags)) | \
+ (((_val) << _flags##_S) & (_flags)), _reg)
-#define AR5K_REG_MASKED_BITS(hal, _reg, _flags, _mask) \
- ath5k_hw_reg_write(hal, (ath5k_hw_reg_read(hal, _reg) & \
- (_mask)) | (_flags), _reg)
+#define AR5K_REG_MASKED_BITS(hal, _reg, _flags, _mask) \
+ ath5k_hw_reg_write(hal, (ath5k_hw_reg_read(hal, _reg) & \
+ (_mask)) | (_flags), _reg)
-#define AR5K_REG_ENABLE_BITS(hal, _reg, _flags)
\
+#define AR5K_REG_ENABLE_BITS(hal, _reg, _flags) \
ath5k_hw_reg_write(hal, ath5k_hw_reg_read(hal, _reg) | (_flags), _reg)
-#define AR5K_REG_DISABLE_BITS(_reg, _flags) \
- AR5K_REG_WRITE(_reg, AR5K_REG_READ(_reg) & ~(_flags))
+#define AR5K_REG_DISABLE_BITS(hal, _reg, _flags) \
+ ath5k_hw_reg_write(hal, ath5k_hw_reg_read(hal, _reg) & ~(_flags), _reg)
-#define AR5K_PHY_WRITE(hal, _reg, _val)
\
+#define AR5K_PHY_WRITE(hal, _reg, _val) \
ath5k_hw_reg_write(hal, _val, (hal)->ah_phy + ((_reg) << 2))
-#define AR5K_PHY_READ(hal, _reg) \
- ath5k_hw_reg_read(hal, (hal)->ah_phy + ((_reg) << 2))
+#define AR5K_PHY_READ(hal, _reg) \
+ ath5k_hw_reg_read(hal, (hal)->ah_phy + ((_reg) << 2))
#define AR5K_REG_WAIT(_i) do { \
if (_i % 64) \
Modified: branches/ath5k/ath5k_hw_inivals.c
===================================================================
--- branches/ath5k/ath5k_hw_inivals.c 2007-08-30 01:59:13 UTC (rev 2696)
+++ branches/ath5k/ath5k_hw_inivals.c 2007-08-30 11:55:21 UTC (rev 2697)
@@ -1008,7 +1008,7 @@
for (i = 0; i < size; i++) {
/* On channel change there is
* no need to mess with PCU */
- if ((change_channel == TRUE) &&
+ if ((change_channel == 1) &&
(ini_regs[i].ini_register >= AR5K_PCU_MIN) &&
(ini_regs[i].ini_register <= AR5K_PCU_MAX))
continue;
@@ -1107,7 +1107,6 @@
/* AR5211 only comes with 5111 */
ath5k_hw_ini_registers(hal, ARRAY_SIZE(rf5111_ini_bbgain),
rf5111_ini_bbgain, change_channel);
- }
break;
#endif
#ifdef CONFIG_ATHEROS_AR5K_AR5210
Modified: branches/ath5k/ath5k_hw_phy.c
===================================================================
--- branches/ath5k/ath5k_hw_phy.c 2007-08-30 01:59:13 UTC (rev 2696)
+++ branches/ath5k/ath5k_hw_phy.c 2007-08-30 11:55:21 UTC (rev 2697)
@@ -537,6 +537,7 @@
*/
static unsigned int ath5k_hw_rfregs_op(u32 *rf, u32 offset, u32 reg, u32 bits,
u32 first, u32 col, bool set)
+{
u32 mask, entry, last, data, shift, position;
s32 left;
int i;
@@ -723,6 +724,7 @@
/*
* Read EEPROM Calibration data, modify RF Banks and Initialize RF5111
*/
+#if defined(CONFIG_ATHEROS_AR5K_AR5211) || defined(CONFIG_ATHEROS_AR5K_AR5212)
static int ath5k_hw_rf5111_rfregs(struct ath_hw *hal,
struct ieee80211_channel *channel, unsigned int mode)
{
@@ -1105,7 +1107,6 @@
static u32 ath5k_hw_rf5110_chan2athchan(struct ieee80211_channel *channel)
{
u32 athchan;
- unsigned int ieee_channel;
/*
* Convert IEEE channel/MHz to an internal channel value used
-------------------------------------------------------------------------
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