Re: CPLD in circuit programming

Ported/C code from app note 58.

Joel

----- Original Message ----- 
From: "Ed Anuff" <ed-w/oILpklh+wAvxtiuMwx3w@xxxxxxxxxxxxxxxx>
To: "Joel Winarske" <joelw-RfnZ/IetPaS9TMao6EloiEEOCMrvLtNR@xxxxxxxxxxxxxxxx>
Cc: <TINI-6tN4nzCoH/hBDgjK7y7TUQ@xxxxxxxxxxxxxxxx>
Sent: Friday, June 27, 2003 5:24 PM
Subject: Re: [TINI] CPLD in circuit programming


> Is this using the Xilinx/Systronix/SmartSC Java code from app note #351,
the
> C code from app note #58, or something new?
>
> Ed
>
> ----- Original Message ----- 
> From: "Joel Winarske" 
> <joelw-RfnZ/IetPaS9TMao6EloiEEOCMrvLtNR@xxxxxxxxxxxxxxxx>
> To: "Ed Anuff" <ed-w/oILpklh+wAvxtiuMwx3w@xxxxxxxxxxxxxxxx>
> Cc: <TINI-6tN4nzCoH/hBDgjK7y7TUQ@xxxxxxxxxxxxxxxx>
> Sent: Friday, June 27, 2003 5:17 PM
> Subject: Re: [TINI] CPLD in circuit programming
>
>
> > I have this working with C and Java.  It works quite well.
> > You need to create a SVF file using Xilinx iMPACT in file mode.
> > Then compress it using the provided utility with source code.
> > Then run utility on it.  Works like a champ.
> >
> > Joel W.
> >
> >
> >
> > ----- Original Message ----- 
> > From: "Ed Anuff" <ed-w/oILpklh+wAvxtiuMwx3w@xxxxxxxxxxxxxxxx>
> > To: <tini-6tN4nzCoH/hBDgjK7y7TUQ@xxxxxxxxxxxxxxxx>
> > Sent: Friday, June 27, 2003 8:45 AM
> > Subject: Re: [TINI] CPLD in circuit programming
> >
> >
> > > I saw this was discussed a couple of weeks ago but it didn't seem like
a
> > > solution was found, so I thought I'd add my 2 cents to the subject.
> > > Apparently, Xilinx used to support programming a CPLD from the TINI
and
> > > published an application note to this effect:
> > >
> > > http://www.xilinx.com/xapp/xapp351.pdf
> > >
> > > Basically, it describes programming of a CPLD via it's JTAG TAP pins
by
> > > wiring it to the the following pins on the TINI:
> > >
> > > TINI D0 -> CPLD TDI
> > > TINI D1 -> CPLD TMS
> > > TINI PCE0 -> CPLD TCK
> > > CPLD TDO -> TINI D2
> > > TINI CTX -> CPLD Reset
> > >
> > > Where it gets interesting is that rather than use the C code used in
the
> > > current app note on the subject
> (http://www.xilinx.com/xapp/xapp058.pdf),
> > it
> > > used an alternate simplified mechanism described in an app note which
is
> > no
> > > longer available on the Xilinx site which I was able to find with
Google
> > >
> >
>
(www.nalanda.nitc.ac.in/industry/appnotes/xilinx/documents/xapp/xapp326.pdf)
> > > .  I'm sure that the process for programming the CPLD via the TINI was
> > slow
> > > due to data transer speed, but it looks like assuming the programming
> > > instructions are "unrolled" into a byte array, that they're all sent
to
> > the
> > > CPLD via a single DataPort.write call, so that the programming speed
> took
> > > place at the fatest transfer speed supported via the TINI.
> > >
> > > The Xapp351 app note describes software for the TINI that at one time
> was
> > > available for download but which appears to no longer available,
> probably
> > > because it's unsupported.  I'm posting this in the hopes that someone
on
> > > this list downloaded it when the app note was first published and
still
> > has
> > > it lying around.
> > >
> > > Ed
> > >
> > > ----- Original Message ----- 
> > > From: "V Efremov" <vefremov-Wuw85uim5zDR7s880joybQ@xxxxxxxxxxxxxxxx>
> > > To: <tini-6tN4nzCoH/hBDgjK7y7TUQ@xxxxxxxxxxxxxxxx>
> > > Sent: Thursday, June 12, 2003 1:43 AM
> > > Subject: [TINI] CPLD in circuit programming
> > >
> > > > Hi list,
> > > >
> > > > Has anyone tried programming the xilinx CPLD from the TINIIn400
> itself?
> > > > There is an appnote an some source code how to do so from a generic
> > 8051,
> > > > but I wonder what the implications on the bus may be.
> > > >
> > > > Is the XILINX in disconnected (high impedance) state while the
> > programming
> > > > is in progress?
> > > >
> > > > ~Venelin
> > > >
> > > > _______________________________________________
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> > > >
> > >
> > >
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> >
> >
>
>

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