Re: CPLD/FPGA in circuit programming - why I don't like VHDL

At 03:41 PM 6/27/2003 -0700, Ed Anuff wrote:
> Not to start a language war, but soley out of curiosity, is Verilog better?
>
> Ed

It's probably just me, but Verilog is more C-like and easier to read. My 
real beef is that VHDL has no explicit register construct. This still 
boggles my mind. It's not possible to easily see where you have created 
(intentionally or otherwise) registers in VHDL, and I find that pretty lame.

Bruce


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