Re: CPLD/FPGA in circuit programming

At 08:45 AM 6/27/2003 -0700, Ed Anuff wrote:
> <snip>
> The Xapp351 app note describes software for the TINI that at one time was
> available for download but which appears to no longer available, probably
> because it's unsupported.  I'm posting this in the hopes that someone on
> this list downloaded it when the app note was first published and still has
> it lying around.

We can go one better - we (Systronix) and David MacMahon (SmartSC) actually 
created this application for Xilinx at the DAC conference in 2000 I think.

It was a bit of a kludge since we did have to "unroll" the programming file 
into a bit stream in order to get it to run acceptably quickly on TINI, by 
squirting a single unrolled array at the Xilinx JTAG port with a buffered 
DataPort write as you noticed. This is so because JTAG hardware is bit 
serial and the programming file stores chunks of data in parallel. There 
were some other considerations too, details of which I don't recall, some 
JTAG cycles which were different from simple data transfers.

So the point is we still have all these files lying around, but would need 
Xilinx' permission to publish them.

By sheer coincidence I've been thinking about this after being at the PDPTA 
multi-conference earlier this week
http://www.ashland.edu/~iajwa/conferences/
and brainstorming with a number of other folks.

So what we are tossing around is an open source Java class library to 
handle on-the-fly reprogramming of FPGAs and CPLDs so that you could use an 
FPGA as a custom front end in a signal processing application and load a 
variety of routines du jour into it (image filtering for example). Or 
creating a custom hardware interface on a JSimm.FPGA board and then popping 
it into a new TStik/TILT400 board.

One nice-to-have ingredient would be a Java to FPGA compiler. I was told 
there were such animals but have not been able to find one. At the moment 
we use schematics and Verilog (I personally dislike VHDL) in the Xilinx 
Webpack tools (free and work great!).

So I will
1) dig out my Xilinx contacts and see if we can publish that project
2) think about moving it forward to the next level as described above

If this idea gets any traction I will post news to this list.

Bruce



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     High speed 8051 systems
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