Re: In kernel PIC support: kernel patch

On Fri, 2007-06-22 at 10:09 +0800, Dong, Eddie wrote:
> Avi Kivity wrote:
> > 
> > Eddie, is that what you were driving at in your simplification
> > attempt? 
> > 
> Yes, some minor thing:
> KVM_ISA_INTERRUPT: Per VM I/F, and need an irq line and irq level.
> KVM_IOAPIC_INTERRUPT: Per VM I/F, may also need irq level for level
> triggered irq.
> KVM_APIC_MESSAGE: Per VCPU I/F

Note that in my implementation the APIC_MESSAGE is also VM I/F.   In
fact, IMHO the only API that should be VCPU I/F is the original API,
KVM_INTERRUPT.  The reason is, the PIC related interrupts are targeted
at the vm-global ISA resources, and the APIC_MESSAGE is targeted at the
vm-global apic *bus*, not a particular lapic (yet).  Its the bus that
then determines the actual routing to its final destination.  I think
this design distinction is important.


> 
> Per step by step approach way, KVM_EXTINT (assume for LINT0/LINT1) can
> be deferred to future implementation.

Unless I misunderstood Avi, I think he was suggesting that use use
KVM_EXTINT/ISA_INTERRUPT as a way to distinguish between the dual modes
of ISA_INTERRUPT as I have today (e.g.
ISA_INTERRUPT(level-1)/ISA_INTERRUPT(level-2)).  This doesn't really
have anything to do with LINT0/1 (directly, anyway).  Hope this helps to
clarify. 

-Greg



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