Re: [patch] wrong tlb flush order

>
>BTW,
>
>The current VMX code does not make sense to me:
>
>static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
>{
>       vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
>}
>

The point is, vmexits will invalidate all TLB entries on Intel VT
processor today.
-Xin 

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