Re: Bochs SMP question: ints to all CPUs?

On Thu, 23 Oct 2003, Warren Toomey wrote:
> Bryce, apologies for e-mail to 2 addresses as I wasn't sure if either worked.
> I'm implementing SMP in an OS and using Bochs as the simulator. Many many
> thanks for the SMP code you've done.
> 
> Can Bochs deliver external interrupts to both CPUs, or just CPU0? If it
> can, what is the magic sequence to do so? I'm only seeing internal
> interrupts on CPU1 at present.
> 
> Thanks in advance for any advice,
k

Warren,

It has been a while since I looked at the SMP code or anything about SMP
in fact.  And even then there were some gaps in my knowledge about how
interrupts+SMP should work.  However, I think the answer to your question
is that external interrupts go to the I/O APIC, and it delivers them to
the CPU or CPUs according to how it (the I/O APIC) is configured.  You can
ask the I/O APIC to deliver specific interrupts to any CPU that you want
by setting up the I/O redirection entries.  The relevant Bochs code is:
  iodev/ioapic.cc: look for trigger_irq, service_ioapic
  cpu/apic.cc: look for deliver method
  iodev/pic.cc: look for BX_SUPPORT_APIC

Please note that there are three apic classes here:

bx_generic_apic_c: contains stuff common to local APICs on CPUs and I/O
APICs.  parent class of the two classes below.

bx_local_apic_c: implements the apic on each CPU.  descends from
bx_generic_apic_c.

bx_ioapic_c: implements the single I/O apic in the system.  descends from
bx_generic_apic_c.

I hope this is helpful!  
Regards,
Bryce



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